The Neutron Computer Project (read: thing I want to do but cannot) is a computer based around the 65816 microprocessor from Western Design Center.
This is a 16-bit processor that was used in the SNES and it has an 8-bit emulation mode compatible with the 6502.
What about memory and IO?
To discuss this, we need a pinout of the 65816.
|7||Valid Program Address|
|8||Positive Power Supply|
|9-20||Address Bus Pins 0-11|
|21||Internal Logic Ground|
|22-25||Address Bus Pins 12-15|
|33-26||Data Bus/Bank Address Bus Pins 0-7|
|35||Emulation/Native Mode Select|
|37||Phase 2 In Clock|
|38||Memory and Index Register Mode Select|
|39||Valid Data Address|
When it comes to memory management and IO space, we are worried about the Address Bus, the Bus Enable line, the Data and Bank Address Bus, the Read/Write line, and the Valid Data/Valid Program Address lines.
The Address Bus pins are explanatory - it consists of 16-pins allowing access to 64 kibibytes (commonly referred to, falsely, as kilobytes), or 65536 bytes. The Data/Bank Address bus, when acting as the Bank Address bus, allows access to 256 64 kiB banks, resulting in a total of 16 MiB.
The Bus Enable and Read/Write lines are also self explanatory - the Bus Enable line enables the address and Data/Bank Address busses, and the Read/Write line sets whether the processor is reading from or writing to memory.
The Valid Data and Valid Program Address lines indicate whether an address is valid and are used for memory or IO address qualification.
Really, we just need to figure out how to map read-only memory, random access memory, and IO addresses to our 16 MiB of address space. Which is going to be a bit odd.
Here's a preliminary memory chart I drew up on some engineering graph paper I bought from the College of Engineering and Science, my email is on the picture if you have any suggestions.